Integrated circuits (ICs) are typically clocked devices. In other words, an input clock signal is typically provided to an IC and is distributed throughout the IC, where it controls the timing of signal interactions throughout the circuitry. Therefore, a clock signal is arguably one of the most important signals in the entire IC.
Clock integrity is very important for reliable system operation. Data signals tend to be fairly non-critical, e.g., timing jitter and amplitude spikes on a data signal typically do not matter except at the moment when the data is being clocked into a storage cell or flip-flop. However, an input clock signal can come from any of several sources, e.g., internal to the IC, external to the IC, an external microprocessor, and so forth. Some of these signal sources might provide clock signals that are small and weak. For example, the configuration process in a programmable logic device (PLD) is often controlled by a configuration clock signal generated by a microprocessor external to the PLD. In these circumstances, it is not uncommon for the configuration clock signal to be a weak signal with slow transitions. Further, some clock signals, such as configuration clock signals for PLDs, are typically routed in a chain to many ICs, precluding simple serial termination.
The situation is exacerbated by the shrinking transistor geometries and reduced operating voltages evinced by modern ICs. As transistors get faster, for example, a clock input may become vulnerable to sporadic fast transients caused by Simultaneously Switching Outputs (SSOs) or by PC-board reflections. A sub-nanosecond perturbation in an input clock signal can cause on-chip double-triggering if the glitch propagates into the clock structure of the IC. In other words, a signal intended to be a single clock pulse might appear at the input clock terminal as two clock pulses, with undesirable effects. In a typical synchronous system, most signal inputs are inherently insensitive to perturbations that occur shortly after the clock edge, but the clock signal itself is always very sensitive to such perturbations.
Transient noise on an input clock signal can be difficult to detect directly, even with a high-quality oscilloscope. However, it must be corrected to ensure correct operation of the IC. Therefore, attempts are often made to correct clock signal integrity using, for example, low-pass filtering and Schmitt triggers. However, such solutions cause delay and have proven inadequate under some circumstances.
Therefore, it is desirable to provide simple and effective solutions that will suppress noise on input signals, particularly input clock signals.